Thin film transistor and fabrication process of the same
US5953598A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 1996 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Aug 15, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6715
Abstract
A fabrication sequence of a thin film transistor, in which a photoresist film is used as an ion doping mask to shield a portion of an amorphous semiconductor layer larger than a gate electrode formed above in width (gate length). The mask is designed by pre-calculating the accuracy of the alignment and etching, so that the gate electrode overlaps neither the source region nor drain region. Thus, it has become possible to form the gate electrode in such a manner not to overlap the source region or drain region while securing an impurity-free offset region. As a result, the present thin film transistor can reduce the OFF-state current and renders excellent OFF-state characteristics, and therefore, when employed in a liquid crystal display device, the resulting liquid crystal display device can prevent display defects, such as a flicker.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.