Built in self repair for DRAMs using on-chip temperature sensing and heating
US5956350A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Oct 27, 1997 |
| Grant date | Sep 21, 1999 |
| Priority date | — |
| Expiry date | Oct 27, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device which tests the memory array under typical operating conditions. In one embodiment, the memory device incorporates a heating element to heat the memory array to a predetermined operating temperature, and a BIST (built-in self test) unit to test the memory array at the predetermined operating temperature. This may advantageously provide a method for detecting and repairing faulty memory locations that would not normally test faulty under initial power-up conditions. Broadly speaking, the present invention contemplates a memory device which comprises a memory array and a heating element on a substrate. The memory array is configured to receive a read/write signal on a read/write line, configured to receive an address on an address bus, configured to provide data to a data bus when the read/write signal indicates a read operation, and configured to store data from the data bus when the read/write signal indicates a write operation. The data on the data bus is stored in a memory location indicated by the address on the address bus. The heating element is coupled to the substrate to heat the memory array to a predetermined operating temperature. The memory device may fur…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.