Patent · US Expired

N-deep fixed latency fall-through FIFO architecture

US5956492A · kind A · utility

9Cited by

14References

20Claims

0Family size

Assignee

LSI Logic Corporation · US

Inventors

Mark J. Jander · Colorado Springs, US
Jeffrey D. Kasyon · Colorado Springs, US

Key dates

Filing date	Mar 29, 1996
Grant date	Sep 21, 1999
Priority date	—
Expiry date	Mar 29, 2016

Classification

Technology area (CPC G)Physics
CPC primaryG06F5/06
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A first-in-first-out (FIFO) memory system. The FIFO memory system contains a first fall-through FIFO having an input and an output. A pointer-based FIFO having an input and an output, wherein the input of the pointer-based FIFO is connected to the output of the first fall-through FIFO. The FIFO memory system also includes a second fall-through FIFO having an input and an output, wherein the input of the second fall-through FIFO is connected to the output of the pointer-based FIFO, wherein data placed into the input of the first fall-through FIFO appears at the output of the second fall-through FIFO in a first-in-first-out basis.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.