Output buffer for memory circuit
US5959474A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1997 |
| Grant date | Sep 28, 1999 |
| Priority date | — |
| Expiry date | Dec 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00361
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An output buffer circuit comprising a pull-up transistor, a pull-down transistor coupled to the pull-up transistor, a first voltage source for supplying a driving voltage, a second voltage source for supplying a reference voltage, a device for comparing the driving voltage with the reference voltage, a driving voltage detector for producing a signal in response to operation of the comparing device, first and second pull-up driving buffers, the first and second pull-up driving buffers being activated according to the signal from the driving voltage detector, the pull-up transistor being driven by one of the pull-up driving buffers, and first and second pull-down driving buffers, the first and second pull-down driving buffers being activated according to the signal from the driving voltage detector, and the pull-down transistor being driven by one of the pull-down driving buffers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.