Method and processing interface for transferring data between host systems and a packetized processing system
US5961626A · kind A · utility
61Cited by
12References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 10, 1997 |
| Grant date | Oct 5, 1999 |
| Priority date | — |
| Expiry date | Oct 10, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/387
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Interface processor (IP)(50) sends and receives data units to and from an external host and a processor. The IP is capable of simultaneous, full duplex operation via high speed serial and parallel interfaces. The IP provides a highly flexible and configurable interface which is capable of interfacing to a variety of systems with minimal external hardware. The IP also provides a method of converting received data into data packets. The IP provides buffering of multiple data packets for use in systems having "bursty" data traffic. The IP has a memory expansion capability allowing for changeable buffer capacities.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.