Patent · US Expired

Sample and hold circuit and method with common mode differential signal feedback for converting single-ended signals to differential signals

US5963156A · kind A · utility

36Cited by
3References
26Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 22, 1997
Grant dateOct 5, 1999
Priority date
Expiry dateOct 22, 2017

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03F3/45995
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A sample and hold (S/H) circuit with common mode differential signal feedback for converting single-ended signals to differential signals includes a feedback loop for the input switched capacitor circuit to ensure that the input common mode voltage for the differential amplifier is maintained at a known value during the hold phase of operation. The feedback loop consists of a three-input error amplifier which monitors the two voltages at the differential input terminals of the differential amplifier in relation to the common mode reference voltage and generates a feedback voltage which is applied to the input terminals of the input switched capacitor circuit during the hold phase of operation. If both of the differential input terminal voltages are either more negative or more positive than the common mode reference voltage then the feedback voltage generated by the error amplifier is made more positive or negative, respectively.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.