Storage access validation to data messages using partial storage address data indexed entries containing permissible address range validation for message source

US5964835A · kind A · utility

Assignee

• Tandem Computers Incorporated · US

Inventors

• Daniel L. Fowler · Kentwood, US
• William E. Baker · Austin, US
• William P. Bunton · Pflugerville, US
• Gary F. Campbell · Palo Alto, US
• Richard W. Cutts, Jr. · Georgetown, US
• David J. Garcia · Los Gatos, US
• Paul N. Hintikka · Austin, US
• Robert W. Horst · San Jose, US
• Geoffrey Ignatius Iswandhi · Sunnyvale, US
• David P. Sonnier · Austin, US
• William J. Watson · Austin, US
• Frank A. Williams · Austin, US

Key dates

• Filing date: Jun 7, 1995
• Grant date: Oct 12, 1999
• Expiry date: Jun 7, 2015

Classification

• Technology area (CPC H): Electricity
• CPC primary: H04L12/56
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A multiprocessor system includes a number of central processing unit (CPUs) and at least one input/output (I/O) device interconnected by routing apparatus for communicating packetized messages therebetween. The messages contain address information identifying the source and destination of the message, and may also contain requests to write to, or read from, storage of a CPU. Protection against errant reads or writes is provided by an access validation method that utilizes access validation information contained in plural entries maintained by each CPU. Each entry provides validation by identifying what elements of the system has read and/or write wccss to the memory of that CPU, without which memory access is denied.