Patent · US Expired

Circuit arrangement for executing a reset

US5964888A · kind A · utility

4Cited by
7References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 7, 1996
Grant dateOct 12, 1999
Priority date
Expiry dateNov 7, 2016

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F1/24
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A circuit arrangement for executing a reset, in which controlled resetting of a functional computer and a safety module takes place. A reset stage is able to coerce both the functional computer and the safety module into a reset state, while all output stages are switched off for all reset states. The functional computer and the safety module are connected by a serial interface to continually monitor each other and can mutually reset one another in the case of a fault.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.