Method of forming low resistance gate electrodes
US5966597A · kind A · utility
53Cited by
7References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 1, 1998 |
| Grant date | Oct 12, 1999 |
| Priority date | — |
| Expiry date | Jun 1, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/663
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a transistor device, and a process for fabricating such a device, in which a top portion of a polysilicon gate electrode is removed and replaced by a low resistance metal material using a damascene process. Gate electrodes in accordance with the present invention provide improved conductivity over conventional polysilicon and silicide-capped polysilicon gate electrodes, due to the low resistivity of the metal, but do not have the drawbacks associated with the complete removal and replacement of polysilicon with a metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.