Method and apparatus for improved peripheral bus utilization
US5968147A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 1997 |
| Grant date | Oct 19, 1999 |
| Priority date | — |
| Expiry date | Sep 26, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a system for minimizing the utilization of an I/O bus by a first data-writing peripheral device that is connected to the I/O bus. The system has a second peripheral device that shares the I/O bus connection. The system includes the operations of transferring data to a drive buffer that is in the first data-writing peripheral device. The transferring being configured to continue until the drive buffer has reached a full state. Performing a pre-write calibration of the first data-writing peripheral device after the drive buffer has reached the full state. Commencing a writing of a portion of the data contained in the drive buffer, such that the first data received by the drive buffer is written first. The system further including releasing the I/O bus connection by placing a write thread of the first data-writing peripheral device in a sleep mode. Wherein when the write thread of the first data-writing peripheral device is in the sleep mode the I/O bus connection is made available to the second peripheral device while the first data-writing peripheral device is not transferring data. The system further includes continually bring the write thread of the first data-writing…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.