Frequency divider with low power consumption
US5969548A · kind A · utility
6Cited by
4References
1Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 18, 1998 |
| Grant date | Oct 19, 1999 |
| Priority date | — |
| Expiry date | Sep 18, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/667
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency divider or dual module prescaler having a division factor switchable between 1/N and 1/(N+1) with an input signal frequency of approximately 1 GHz. The divider includes only one input flip-flop to process the input signal and an intermediate signal having half the frequency as supplied to a divider expansion either directly, or in inverted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.