Low noise method for interconnecting analog and digital integrated circuits
US5969562A · kind A · utility
1Cited by
3References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 30, 1997 |
| Grant date | Oct 19, 1999 |
| Priority date | — |
| Expiry date | Oct 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018528
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for interconnecting digital and analog circuitry on separate substrates within a single integrated chip package attenuates logic level signals on one substrate, transmits the attenuated signals to another substrate, and amplifies the attenuated signals back to logic level signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.