Circuit configuration for line adaptation and echo suppression
US5969567A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1997 |
| Grant date | Oct 19, 1999 |
| Priority date | — |
| Expiry date | Mar 26, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B3/23
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A circuit configuration for line adaptation and echo suppression includes a balance filter which is triggered by transmission signals and supplies output signals that are linked through a subtractor to a reception signal. An impedance adaptation filter is triggered by the reception signal and supplies an output signal that is linked through an adder to the transmission signal. An analog/digital converter converts analog reception signals into digital reception signals. A digital/analog converter converts digital transmission signals into analog transmission signals. The impedance adaptation filter processes digital signals and the balance filter processes analog signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.