Circuit for selectively performing data format conversion
US5970236A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 1995 |
| Grant date | Oct 19, 1999 |
| Priority date | — |
| Expiry date | Nov 14, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4013
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for selectively performing big-endian/little-endian data format conversion based on whether instructions or data are being transferred. The data and instructions are allocated to different regions in memory so that the big-endian/little-endian conversion is based on the source or destination address of the requested operation. Registers are provided to define a lower bound address and an upper bound address. In addition, a separate register is provided which indicates whether the data is stored between the lower bound and upper bound addresses or outside the lower bound and upper bound addresses. The registers are write addressable through the PCI configuration space, the memory space, and the I/O space, which allows the values in the registers to be changed dynamically during computer system operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.