Method of manufacturing a semiconductor device with a BiCMOS circuit
US5970332A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 1996 |
| Grant date | Oct 19, 1999 |
| Priority date | — |
| Expiry date | Mar 27, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0109
Abstract
A method of manufacturing a semiconductor device with a bipolar transistor (1) and a MOS transistor (2) formed in a silicon body (3) which for this purpose is provided with a field insulation region (4) by which semiconductor regions (6, 7) adjoining a surface (5) of said body are mutually insulated. A first region (6) is destined for the bipolar transistor and a second region (7) for the MOS transistor. The second region is provided with a gate dielectric (10). Then an electrode layer of non-crystalline silicon (11) is provided on the surface, which electrode layer is provided with a doping and in which electrode layer subsequently an emitter electrode (12) is formed on the first region and a gate electrode (13) on the second region. The electrode layer is provided with a doping by means of a treatment whereby a first dopant is provided at the area of the first region and a second dopant at the area of the second region, the first dopant being provided to a concentration such that the emitter zone of the transistor can be formed through diffusion from the emitter electrode to be formed in the electrode layer, while the second dopant is provided to a concentration lower than that o…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.