Microprocessor with circuits, systems, and methods for interrupt handling during virtual task operation
US5974440A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 1997 |
| Grant date | Oct 26, 1999 |
| Priority date | — |
| Expiry date | Mar 25, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4812
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a microprocessor embodiment (26), the microprocessor is operable to multi-task a plurality of programs, wherein the plurality of programs include a virtual program (38, 40) operable in a virtual mode and a monitor program (36) in a protected mode. The microprocessor includes an interrupt handling circuit (30) for executing an interrupt handler in response to a hardware interrupt request signal (HIM.cndot.INTR). The microprocessor further includes an interrupt flag bit (IF) set in a like manner in both the virtual mode and the protected mode. The interrupt flag bit is set in a first state to inhibit receipt of the hardware interrupt request signal by the interrupt handling circuit, and the interrupt flag bit is set in a second state to enable receipt of the hardware interrupt request signal by the interrupt handling circuit. The microprocessor further includes a virtual mode control signal (VM.cndot.VME), wherein the virtual mode control signal is set in a first state to indicate a program is operating in a virtual mode and is set in a second state to indicate a program is not operating in a virtual mode. Still further, the microprocessor includes a mask bit (HIM) and circuitry (…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.