System for allowing multiple instructions to use the same logical registers by remapping them to separate physical segment registers when the first is being utilized
US5974525A · kind A · utility
27Cited by
13References
20Claims
0Family size
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Key dates
| Filing date | Dec 5, 1997 |
| Grant date | Oct 26, 1999 |
| Priority date | — |
| Expiry date | Dec 5, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/384
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique for increasing the number of physical segment registers by renaming logical segment registers into a larger register space. The remapping of the segment registers allows for instructions accessing the segment registers to be executed non-serially. The renaming of segment registers is achieved by assigning a shadow register to a segment register name. Thus, a pair of registers are physically available for a specified logical register in an instruction set to be renamed. Two bits, designated as the PSEG and SPEC bits, are used to control the remapping.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.