Method and apparatus for controlling an output frequency of a phase locked loop
US5977836A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 1997 |
| Grant date | Nov 2, 1999 |
| Priority date | — |
| Expiry date | Jun 16, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/20
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for controlling an output frequency of a phase locked loop is accomplished by determining a plurality of divider ratios which are based on an input frequency, parameters, and a desired output frequency. Each of the divider ratios is representative of a ratio between the output frequency and input frequency of the phase locked loop. Having determined the plurality of divider ratios, another determination is subsequently made to determine whether the plurality of divider ratios enable the phase locked loop to produce the output frequency within a given frequency tolerance, i.e., within an allowable error. The determination is based on whether changing the divider ratio from the one of the plurality of ratios to an adjacent ratio causes the output frequency to change more than the allowable error. If so, the plurality of ratios needs to be recalculated based on a change in the input frequency and/or one of the parameters. When the output frequency can be established within the allowable error (i.e., a change from one of the divider ratios to another one produced calculated output frequencies that are within the allowable error), the phase locked loop utilizes on…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.