Packet protocol and distributed burst engine
US5978858A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 1997 |
| Grant date | Nov 2, 1999 |
| Priority date | — |
| Expiry date | Sep 30, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for decoupling input/output (I/O) from host processing through main memory. A command packet architecture and distributed burst engine for communicating data to an I/O device without using memory mapped I/O or host processor synchronization. The packet architecture includes a header having fields for linking packets in a list with physical and virtual addresses, thereby eliminating address translations. The distributed burst engine includes buffers and controllers for bursting the linked lists of packets between main memory and the I/O device. Doorbell registers are included for the host processor to indicate to the DBE that an event has occurred. The distributed burst engine is versatile enough to be bus independent and located virtually anywhere between main memory and the I/O device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.