Patent · US Expired

Method and apparatus for duplicating tag systems to maintain addresses of CPU data stored in write buffers external to a cache

US5978886A · kind A · utility

9Cited by
9References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 17, 1997
Grant dateNov 2, 1999
Priority date
Expiry dateJan 17, 2017

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/1016
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An apparatus and method for duplicating tag addresses to maintain addresses of central processing unit (CPU) data stored in write buffers external to a cache are disclosed. Advance notification of write transactions is issued to allow a subsystem that maintains duplicate cache tags to know in advance which write transactions are present in the CPU's buffers. Such information is used to keep duplicate tags for both the cache and any buffers that contain writes that are to be removed from the cache. The cache is preferably a direct mapped cache and the CPU preferably resides within a multiprocessor architecture. In the preferred embodiment, all write transactions are indirectly caused by a read transaction that is about to bring a line into the cache. Thus, a read transaction is issued by the CPU before the write transaction is issued. A field is added to the read transaction that indicates whether or not the read transaction has a corresponding line that must be written out of the cache and into a buffer, such that the duplicate tags duplicate both the CPU cache and the CPU write buffers.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.