Method for speeding mathematical operations in a processor core
US5978895A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 4, 1997 |
| Grant date | Nov 2, 1999 |
| Priority date | — |
| Expiry date | Apr 4, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/355
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus are disclosed for increasing the speed of mathematical operations in a processor core. The invention increases the speed of mathematical operations by delivering a first instruction indicating the total number of clock cycles a sequence of operations will occupy. On a first subsequent cycle, a different instruction is provided including operand addresses. Other instructions containing operand addresses may be provided on subsequent cycles. Alternatively, an internal pointer may be dynamically changed each cycle to provide new operand addresses. The operands are then retrieved and operated on while other operands are generated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.