Electronic device manufacture
US5980763A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 30, 1997 |
| Grant date | Nov 9, 1999 |
| Priority date | — |
| Expiry date | May 30, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flat panel display or other large-area electronic device comprises at least one TFT (T1;T2) having a crystalline channel region (1) and amorphous edge regions (13) adjacent side-walls (12) of the TFT island (11). The TFT is fabricated by steps which include: PA1 (a) depositing on substrate (10) a thin film (11') of amorphous semiconductor material to provide the semiconductor material, PA1 (b) removing areas of the thin film (11') to form the side walls (12a, 12b) of each island (11), PA1 (c) forming a masking pattern 20 over the edge regions (13a, 13b) preferably on an insulating film 22, and PA1 (d) directing a laser or other energy beam (50) towards the islands (11) and the masking pattern (20) to crystallise the un-masked semiconductor material for the crystalline channel region (1), while retaining amorphous semiconductor material adjacent the side walls (12a, 12b) where the edge regions (13a, 13b) are masked from the energy beam (50) by the masking pattern (20). The resulting device structure has e.g polycrystalline TFTs (T1, T2) with low off-state leakage currents as a result of the amorphous material properties kept for the edge regions (13a) particularly where crossed by…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.