Method for manufacturing non-volatile memory
US5981366A · kind A · utility
20Cited by
12References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 17, 1992 |
| Grant date | Nov 9, 1999 |
| Priority date | — |
| Expiry date | Sep 17, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A method for forming a non-volatile memory having a floating gate electrode arranged therein. The floating gate electrode being formed by alternatingly laminating on a silicon substrate a polysilicon layer and a tungsten silicide layer with a tunnel oxide sandwiched between said substrate and said polysilicon layer. The tungsten silicide layer is formed with a CVD technique reducing WF.sub.6 gas with SiH.sub.2 Cl.sub.2 gas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.