Actived matrix substrate having a transistor with multi-layered ohmic contact
US5981972A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 1998 |
| Grant date | Nov 9, 1999 |
| Priority date | — |
| Expiry date | May 15, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6746
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An active matrix substrate of a Pixel on Passivation structure includes TFTs and pixel electrodes on an interlayer insulating film over bus lines. The interlayer insulating film is formed of an organic insulating film, and the contact layer of the TFT has a double layer structure of a fine crystal silicon (n.sup.+) layer and an amorphous silicon (n.sup.+) layer the crystal silicon (n.sup.+) layer being placed on the side closer to the source electrode and the drain electrode, and the amorphous silicon (n.sup.+) layer being placed on the opposite side. This improves both the ON characteristics and the OFF characteristics of the TFT are improved, and the stable operative region of the active matrix substrate and the margin to accommodate to variations in threshold value due to aging are expanded, without substantial additional production costs and a decrease in productivity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.