Floating point processor for a three-dimensional graphics accelerator which includes single-pass stereo capability
US5982375A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 20, 1997 |
| Grant date | Nov 9, 1999 |
| Priority date | — |
| Expiry date | Jun 20, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N13/398
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A computer system which exhibits increased performance for stereo viewing. The computer system includes a display screen, a bus for transferring data, a memory coupled to the bus for storing geometric primitives and left and right view transformation matrices. Furthermore, the computer system includes a processor coupled to the bus, wherein the processor is configured to enable stereo mode and to execute an application for rendering objects on the display screen in the stereo mode. The computer system also includes a graphics accelerator coupled to the bus. The graphics accelerator includes a buffer for storing a received geometric primitive to be rendered in stereo mode, as well as memory for storing the left and right view transformation matrices. The graphics accelerator also includes a transformation unit which is configured to generate a first transformed geometric primitive in response to the received geometric primitive and the left view transformation matrices. The transformation unit is configured to subsequently generate a second transformed geometric primitive in response to the received geometric primitive and the right view transformation matrices. The received geometr…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.