Smart peripheral back-power prevention
US5986352A · kind A · utility
2Cited by
17References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 1997 |
| Grant date | Nov 16, 1999 |
| Priority date | — |
| Expiry date | Sep 30, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for preventing peripherals from back powering a host computer is disclosed. The apparatus use a timer and associated logic circuitry to determine the time period between signals being sent to the host computer from the peripheral device. Under predetermined time-out conditions, the current output by the peripheral is disabled to prevent the peripheral from back powering a main computer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.