Method and system for simulating and making a phase lock loop circuit
US5987238A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 27, 1996 |
| Grant date | Nov 16, 1999 |
| Priority date | — |
| Expiry date | Nov 27, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of making a phase lock loop circuit is disclosed. The method includes a method of simulating the phase lock loop circuit. The simulation runs on a system for making phase lock loop circuits. The simulation step initializes a reference frequency variable associated with a reference frequency of a phase lock loop circuit. The simulation method also initializes a voltage controlled oscillator (VCO) frequency variable associated with a VCO frequency of the phase lock loop circuit. A phase error is obtained from a frequency error between the reference frequency variable and the VCO frequency variable. The simulation method resets the phase error by a reset phase level when the phase error is approximately the same as a multiple of a reset threshold. When the frequency error changes sign, the phase error is permitted to also change sign. The simulation also determines a loop filter input for the phase lock loop circuit that depends upon the phase error and the frequency error. The simulation method provides a dramatic improvement in simulation time over conventional simulation methods.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.