Power management masked clock circuitry, systems and methods
US5987244A · kind A · utility
54Cited by
20References
36Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 4, 1996 |
| Grant date | Nov 16, 1999 |
| Priority date | — |
| Expiry date | Dec 4, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/1632
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic system (100) includes a register (TONTOFF) for data and a clock circuit (2340, 708) coupled to the register and responsive to the data in the register to generate a series of clock pulses (CPU.sub.-- CLK). The series of clock pulses occupies time intervals (2550) interspersed with time intervals free of clock pulses (2552), as an output having a ratio of the time intervals responsive to the data. Other devices, systems and methods are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.