Method and apparatus providing short latency round-robin arbitration for access to a shared resource
US5987549A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1996 |
| Grant date | Nov 16, 1999 |
| Priority date | — |
| Expiry date | Jul 1, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/368
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Low-latency distributed round-robin arbitration is used to grant requests for access to a shared resource such as a computer system bus. A plurality of circuit board cards that each include two devices such as CPUs, I/O units, and ram and an address controller plugs into an Address Bus in the bus system. Each address controller contains logic implementing the arbitration mechanism with a two-level hierarchy: a single top arbitrator and preferably four leaf arbitrators. Each address controller is coupled to two devices and the logical "OR" of their arbitration request is coupled via an Arbitration Bus to other address controllers on other boards. Each leaf arbitrator has four prioritized request in lines, each such line being coupled to a single address controller serviced by that leaf arbitrator. By default, each leaf arbitrator and the top arbitrator implement a prioritized algorithm. However a last winner ("LW") state is maintained at every arbitrator that overrides the default, to provide round-robin selection. Each leaf arbitrator arbitrates among the zero to four requests it sees, selects a winner and signals the top arbitrator that it has a device wishing access. At the top a…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.