Method of obtaining a buffer contiguous memory and building a page table that is accessible by a peripheral graphics device
US5987582A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 30, 1996 |
| Grant date | Nov 16, 1999 |
| Priority date | — |
| Expiry date | Sep 30, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a computer system, a peripheral graphics device (PGD) accesses a graphics buffer (GB) wherein the GB physical pages can be contiguous or discontiguous. A request is received to allocate memory for a GB of a predetermined size and handle. The number of pages within the size parameter is determined based on the page size used by the computer system and the buffer size needed. A first memory block is allocated for storing the GB and locked to prevent swapping. A starting virtual address of a CPU page table (CPU/PT) is accessed and mapped to a starting logical address to allow traversal of the CPU/PT by a user application. A second memory block is allocated for building a graphics device page table (GDPT) that can be accessed by a PGD. The logical address of each GB page is sequentially accessed and the corresponding physical address of each GB page is determined from the CPU/PT. The logical and physical addresses of each GB page are stored into the GDPT. If all physical pages of the GB are contiguous, the logical and physical addresses of the GB are stored into a database indexed by a user handle. Otherwise, the starting address of the GDPT is stored into the database indexed by a …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.