Method and apparatus for automatically correcting errors detected in a memory subsystem
US5987628A · kind A · utility
103Cited by
21References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 26, 1997 |
| Grant date | Nov 16, 1999 |
| Priority date | — |
| Expiry date | Nov 26, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for correcting corrupted data. Access logic accesses a memory. Error detection logic generates an error signal for each data value output by the memory to indicate whether the data value has a correctable error. Correction logic requests the access logic to write to the memory a corrected version of each data value indicated by the error signal to have a correctable error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.