Patent · US Expired

Hole impact ionization mechanism of hot electron injection and four-terminal .rho.FET semiconductor structure for long-term learning

US5990512A · kind A · utility

55Cited by
18References
33Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 22, 1997
Grant dateNov 23, 1999
Priority date
Expiry dateApr 22, 2017

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D48/36

Abstract

Hot-electron injection driven by a hole impact ionization mechanism at the channel-drain junction provides a new method of hot electron injection. Using this mechanism, a four-terminal pFET floating-gate silicon MOS transistor for analog learning applications provides nonvolatile memory storage. Electron tunneling permits bidirectional memory updates. Because these updates depend on both the stored memory value and the transistor terminal voltages, the synapses can implement a learning function. The synapse learning follows a simple power law. Unlike conventional EEPROMs, the synapses allow simultaneous memory reading and writing. Synapse transistor arrays can therefore compute both the array output, and local memory updates, in parallel. Synaptic arrays employing these devices enjoy write and erase isolation between array synapses is better than 0.01% because the tunneling and injection processes are exponential in the transistor terminal voltages. The synapses are small, and typically are operated at subthreshold current levels.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.