Metal-based semiconductor circuit substrates
US5990553A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 6, 1998 |
| Grant date | Nov 23, 1999 |
| Priority date | — |
| Expiry date | Apr 6, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Polyimide layers having special properties are formed on the bottom surface of a metallic body for a metal-based semiconductor circuit substrate with a polyimide layer as an insulator. There are four lamination methods: (a) a method in which a layer of thermoplastic polyimide resin (1) and a layer of non-thermoplastic polyimide resin are laminated on the bottom surface of the metallic body one over another in this order, (b) a method in which a layer of thermoplastic polyimide resin (1), a layer of non-thermoplastic polyimide resin and a layer of thermoplastic polyimide resin (2) are laminated on the bottom surface of a metallic body one over another in this order, (c) a method in which a layer of non-thermoplastic polyimide resin is laminated on the bottom surface of a metallic body and (d) a method in which a layer of thermoplastic polyimide resin (2) is laminated on the bottom surface of a metallic body. The resulting semiconductor circuit substrate has improved properties: flat joins to connect external terminals, small variations in shape due to temperature changes, the mounting properties to a mother board, the absorption efficiency of infrared rays during solder reflowing, p…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.