Virtual address access to tiled surfaces
US5990912A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 27, 1997 |
| Grant date | Nov 23, 1999 |
| Priority date | — |
| Expiry date | Jun 27, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/122
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data accessing system provides access data to video display stored in one or more frame buffers via a virtual frame buffer implemented as a phantom port. The virtual frame buffer facilitates remapping between pixel coordinate space and memory address space for both tiled and linear addressing schemes. Generation of virtual linear and virtual tiled addresses is obtained through one or more of shifting, replacing, and concatenating operations. These operations can be implemented to perform very fast in comparison to the multiplication, addition, division, and modulo operations used in conventional display processors, video controllers, and central processing units. In some embodiments of the virtual addresses are converted to addresses in a frame buffer for accessing the frame buffer. Alternate embodiments use a frame buffer adapted to respond directly to generated virtual addresses. The present invention can thus generate addresses for accessing data in a frame buffer and efficiently use data storage capacity in the frame buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.