Semiconductor memory device having data protection feature
US5991197A · kind A · utility
68Cited by
3References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 24, 1998 |
| Grant date | Nov 23, 1999 |
| Priority date | — |
| Expiry date | Mar 24, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A reset power down mode designating signal and first and second write protect signals are provided to a control circuit. According to the states of these external control signals, the status of unconditional inhibition, unconditional permission, and lock bit (LB) dependency for the protect status of data rewrite is set for each memory block group of a memory array. Therefore, the write protect status can be set in a flexible manner for a nonvolatile semiconductor memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.