Cluster determination for circuit implementation
US5991524A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 14, 1997 |
| Grant date | Nov 23, 1999 |
| Priority date | — |
| Expiry date | Apr 14, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are a method, article of manufacture, and apparatus for identifying candidate clusters for matching to cells in a technology library. An automated design system comprises a computer configured to extract a portion of a circuit, levelize it, select a first node, identify the realizable clusters at the inputs of the first node, and combine the first node with realizable clusters at the inputs to produce candidate clusters. A dummy cluster is used at each input to represent using the input as a fanin. The system takes the cross product of the sets, and the first node is merged with each element of the cross product to produce a set of candidate clusters. The candidate clusters are then checked for realizability by comparing them to cells in the technology library, which includes dummy cells to facilitate mapping to large cells in the technology library. A set of realizable clusters is produced for the first node. The system applies the same process to successive nodes in the levelized circuit, including in the intermediate set the sets of realizable clusters for preceding nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.