Semiconductor device
US5994754A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 1998 |
| Grant date | Nov 30, 1999 |
| Priority date | — |
| Expiry date | Jan 5, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/105
Abstract
A multi guard ring structure for a reach-through type semiconductor device has at least first and second guard ring regions. The first guard ring region surrounds a main region with a predetermined first spacing. The second guard ring region surrounds the first guard ring region with a predetermined second spacing. To improve the ability to withstand reverse bias voltage, the second spacing between the first and second guard ring regions is made smaller than the first spacing between the main region and the first guard ring region in order that a maximum value of an electric field strength at a junction between the first guard ring region and the drift region may be equal to or lower than 85% of a maximum value of a field strength at the main junction at the avalanche breakdown condition of the main junction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.