Patent · US Expired

Circuit arrangement for limiting the current at make of a capacitative load

US5994889A · kind A · utility

3Cited by
1References
3Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 2, 1998
Grant dateNov 30, 1999
Priority date
Expiry dateDec 2, 2018

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S323/901
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

A circuit arrangement for limiting the current at make which includes hot-carrier thermistors that see to a reduction of the current flow at make. Only when a further hot-carrier thermistor has been adequately heated by the flow of current are the hot-carrier thermistors bridged, and the capacitative load receives the full operating voltage. After turn-off, an ambient temperature-compensated voltage divider at the base of a transistor prevents the immediate re-activation until the further hot-carrier thermistor and, thus, all hot-carrier thermistors, have adequately cooled.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.