Voltage monitoring circuit and voltage monitoring method with hysteresis characteristic
US5995011A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 1998 |
| Grant date | Nov 30, 1999 |
| Priority date | — |
| Expiry date | Mar 2, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/16538
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A comparison circuit (4) is formed by a Schmidt buffer (4a) which has first and second threshold values and a buffer (4b) whose threshold value is larger than the first threshold value but smaller than the second threshold value. An integrating circuit (3) and the comparison circuit (4) function as a timer circuit which operates in accordance with comparison of the three values. An input signal (IN) decreases from a reference voltage signal (V6). A control signal becomes an H level after a time which is determined by a time constant of the integrating circuit (3) and the threshold value of the buffer (4b), and a detect signal (FO) is outputted after a time which corresponds to a difference between the second threshold value and the threshold value (which is equal to or shorter than a response time of the circuit (4)). During monitoring of a d.c. voltage which is applied to a drive circuit of a semiconductor element by means of a hysteresis operation, chattering of the detect signal is prevented which otherwise occurs despite an unstable hysteresis operation within a monitoring circuit when the d.c. voltage varies above and below a set value in a short period of time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.