On-chip high resistance device for passive low pass filters with programmable poles
US5999043A · kind A · utility
15Cited by
1References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 18, 1997 |
| Grant date | Dec 7, 1999 |
| Priority date | — |
| Expiry date | Dec 18, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H11/53
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A resistive element including a P-channel MOS device (101, 401, 402, 608a-608c) having a first and second current carrying electrodes, and a gate. The first current carrying electrode forms a first impedance terminal and the second current carrying electrode forms a second impedance terminal. A bias circuit (103, 104, 105, 106) coupled to the first current carrying electrode and gate of the P-channel MOS device (101, 401, 402, 608a-608c). The bias circuit (103, 104, 105, 106) generates a voltage less than the threshold voltage of the P-channel MOS device (101, 401, 402, 608a-608c).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.