Method and apparatus for automatically controlling the destination of a graphics command in a register file
US5999200A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 1998 |
| Grant date | Dec 7, 1999 |
| Priority date | — |
| Expiry date | Jan 23, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30043
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics system includes a graphics processor for rendering graphics primitives with a list of display parameters. A host processor generates a display list which includes a XY address for rendering the graphics primitives. A graphics processor which includes a command address feed logic device decodes the display list to determine the register locations in a register file to fill with data. The command address feed logic device decodes the display list and orders a group of registers in the register file in order to perform a sequential write to the register file. By sequentially ordering the register file locations, the command address feed logic device is able to write null or zero data values to the register locations which are not needed to render a primitive, while maintaining a single write cycle to the register file.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.