Patent · US Expired

Invertor with reduced common mode voltage

US5999428A · kind A · utility

11Cited by
2References
4Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 21, 1998
Grant dateDec 7, 1999
Priority date
Expiry dateAug 21, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH02M7/49
  • WIPO fieldElectrical machinery, apparatus, energy
  • WIPO sectorElectrical engineering

Abstract

An inverter having a plurality of inverter bridges which operate in parallel and whose output voltage is summed by way of a transformer. The transformer has a number of primary windings and associated secondary windings which correspond to the number of inverter bridges. Each inverter bridge is connected on the output side to a primary winding. The secondary windings are connected in series to sum the output voltages. The transformer has a center tap which is grounded by a ground connection. The suppression of in-phase or common-mode interference currents flowing by the ground connection and the interference voltages associated therewith is achieved by dividing the secondary windings into a first and second identical partial secondary winding. The partial secondary windings are connected to one another in the center tap in such a way that the common-mode currents and voltages induced in the partial secondary windings mutually cancel.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.