Internal potential generation circuit that can output a plurality of potentials, suppressing increase in circuit area
US5999475A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 1998 |
| Grant date | Dec 7, 1999 |
| Priority date | — |
| Expiry date | Mar 5, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/145
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An internal potential generation circuit operates with the potential levels of an output node N.sub.H1 of a first boosting circuit and an output node N.sub.H2 of a second boosting circuit maintained in common in response to a high voltage switch circuit attaining a conductive state at the initial stage of the operation of the internal potential generation circuit. After the output potential level of the second boosting circuit arrives at a predetermined potential level, the high voltage switch circuit is cut off, whereby the first and second boosting circuits drive independently the potential level of corresponding output nodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.