I.sub.cc current electromagnetic interference choke with multiple choking levels
US6005429A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 1998 |
| Grant date | Dec 21, 1999 |
| Priority date | — |
| Expiry date | Jul 17, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/164
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus for and method of reducing electromagnetic interference of an integrated circuit by providing multiple choking levels are disclosed. A choking circuit includes a choking level select signal generator, a pulse choking circuit connected to the choking level select signal generator, and a modulation control circuit connected to the pulse choking circuit. The choking level is increased when modules of the integrated circuit are less active, which reduces electromagnetic interference. The choking level is decreased when modules of the integrated circuit are more active, which maintains the voltage supplied to the power bus above a desired level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.