Phase adjustment circuit including a ring oscillator in a phase locked loop
US6005445A · kind A · utility
25Cited by
3References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 10, 1997 |
| Grant date | Dec 21, 1999 |
| Priority date | — |
| Expiry date | Dec 10, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00026
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase adjustment circuit includes a ring oscillator which is phase locked to an external pixel clock by a phase locked loop. The ring oscillator is formed of n number of stages of variable delay circuits providing n+1 outputs of substantially equal phase differences. A control signal generation circuit is responsive to a phase control signal to generate n+1 weighting coefficients for weighting the n+1 outputs from the ring oscillator in a weighting circuit which produces a phase adjusted output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.