Priority encoding and decoding for memory architecture
US6006303A · kind A · utility
206Cited by
36References
7Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 28, 1997 |
| Grant date | Dec 21, 1999 |
| Priority date | — |
| Expiry date | Aug 28, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A shared resource access priority encoding/decoding and arbitration scheme takes into account varying device requirements, including latency, bandwidth and throughput. These requirements are stored and are dynamically updated based on changing access demand conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.