Arithmetic logic unit and microprocessor capable of effectively executing processing for specific application
US6006322A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 24, 1997 |
| Grant date | Dec 21, 1999 |
| Priority date | — |
| Expiry date | Oct 24, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30185
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An arithmetic logic unit capable of executing an instruction belonging to a user-defined instruction area at the same clock frequency as a hard-wired logic includes a memory storing data at an arbitrary address and outputting the data stored in the address when an instruction code and an operand data are applied as an address. When an instruction decoder decoding part of the instruction code for setting the memory to read mode or write mode is provided, contents of the memory can be re-written, and therefore the content of the memory can be readily changed even after delivery. The arithmetic logic unit may include, in place of the memory, a programmable logic device adapted to receive an instruction code and the operand data and capable of organizing a desired logic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.