Method of making a mask ROM

US6008093A · kind A · utility

Assignee

• SHARP KABUSHIKI KAISHA · JP

Inventors

• Hitoshi Aoki · Tokyo, JP
• Masatomo Higuchi · Fukuyama, JP
• Keiji Terayama · Kasaoka, JP

Key dates

• Filing date: Jan 5, 1998
• Grant date: Dec 28, 1999
• Expiry date: Jan 5, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B20/383

Abstract

A semiconductor device fabrication method is provided which comprises the steps of: (i) forming a plurality of high concentration diffusion layers of a second conductivity in a semiconductor substrate; (ii) forming a plurality of first gate electrodes extending perpendicularly to the high concentration diffusion layers of the second conductivity on the semiconductor substrate with a first gate insulating film interposed therebetween; (iii) implanting ions of a first conductivity into surface portions of the semiconductor substrate for device isolation by using the first gate electrodes as a mask; (iv) forming side wall spacers on side walls of the first gate electrodes; (v-i) implanting ions of the second conductivity into surface portions of the semiconductor substrate for formation of channel regions by using the first gate electrodes and the side wall spacers as a mask; (vi-i) forming a plurality of second gate electrodes on the ion-implanted channel regions between the first gate electrodes; and (vii) implanting ions of the first conductivity again into surface portions of the semiconductor substrate by using the first gate electrodes and the second gate electrodes as a mask fo…