Patent · US Expired

Frequency divider testing circuit clock-sampling window variable with divider output

US6008655A · kind A · utility

6Cited by
5References
5Claims
0Family size

Assignee

Inventor

Key dates

Filing dateAug 20, 1997
Grant dateDec 28, 1999
Priority date—
Expiry dateAug 20, 2017

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/3016
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

For testing a frequency divider, oscillations are produced and wave-shaped into a series of dock pulses. The dock pulses are supplied to a frequency divider under test. A window pulse of duration equal to one cycle of the output pulses of the frequency divider is used to sample the clock pulses. The sampled clock pulses are counted and compared with a reference value. Depending on the number of the sampled clock pulses relative to the reference value, an output voltage at one of two discrete values is produced to indicate the result of the test.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.