Semiconductor memory device having dynamic data amplifier circuit capable of reducing power dissipation
US6009020A · kind A · utility
410Cited by
2References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 12, 1999 |
| Grant date | Dec 28, 1999 |
| Priority date | — |
| Expiry date | Mar 12, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1051
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor memory device including a pair of data input/output lines, a data amplifier circuit amplifies voltages at the data input/output lines, and a data maintaining circuit maintains output signals of the data amplifier circuit. A data determination circuit, generates a data determination signal after the data maintaining circuit manintains the output signals of the data amplifier circuit and transmits the data transmitting the data determination signal to the data amplifier circuit, thus suspending the operation of the data amplifier circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.